De-prioritization supporting frame buffer caching
US11237967B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2020 |
| Grant date | Feb 1, 2022 |
| Priority date | — |
| Expiry date | Apr 9, 2040 |
Classification
- Technology area (CPC —)General
Abstract
Systems, methods, and computer readable media to manage memory cache for graphics processing are described. A processor creates a resource group for a plurality of graphics application program interface (API) resources. The processor subsequently encodes a set command that references the resource group within a command buffer and assigns a data set identifier (DSID) to the resource group. The processor also encodes a write command within the command buffer that causes the graphics processor to write data within a cache line and mark the written cache line with the DSID, a read command that causes the graphics processor to read data written into the resource group, and a de-prioritize command that causes the graphics processor to notify the memory cache to later flush content from the cache line associated with the DSID and to later invalidate the cache line when higher priority content is received.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.