Memory device, method of operating memory device, and computer system including memory device
US11237983B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
Assignee
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Key dates
| Filing date | May 4, 2020 |
| Grant date | Feb 1, 2022 |
| Priority date | — |
| Expiry date | May 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes; a memory area including a first memory area including first memory cells storing N-bit data and a second memory area including second memory cells storing M-bit data, where ‘M’ and ‘N’ are natural numbers and M is greater than N, and a controller configured to read data stored in the first memory area using a first read operation, read data stored in the second memory area using a second read operation different from the first read operation, and selectively store data in one of the first memory area and the second memory area based on a frequency of use (FOU) of the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.