Display panel, manufacturing method of same, and tiled display panel
US11239277B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 15, 2019 |
| Grant date | Feb 1, 2022 |
| Priority date | — |
| Expiry date | Mar 22, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/0364
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel comprises: an array substrate comprising a display area and a trace area located around the display area; a light-emitting layer located in the display area and electrically connected to a first side of the array substrate; a fanout circuit located in the trace area; a fanout circuit base layer disposed between the fanout circuit and the array substrate; and a driver chip located at a second side of the array substrate; wherein the fanout circuit and the fanout circuit base layer are bent from the first side to the second side along a sidewall of the array substrate, the fanout circuit is electrically connected to the array substrate at the first side, and the fanout circuit is electrically connected to the driver chip at the second side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.