Self-aligned and robust IGBT devices
US11239352B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2020 |
| Grant date | Feb 1, 2022 |
| Priority date | — |
| Expiry date | Feb 28, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical IGBT device is disclosed. The vertical IGBT structure includes an active MOSFET cell array formed in an active region at a front side of a semiconductor substrate of a first conductivity type. One or more column structures of a second conductivity type concentrically surround the active MOSFET cell array. Each column structure includes a column trench and a deep column region. The deep column region is formed by implanting implants of the second conductivity type into the semiconductor substrate through the floor of the column trench. Dielectric side wall spacers are formed on the trench side walls except a bottom wall of the trench and the column trench is filled with poly silicon of the second conductivity type. One or more column structures are substantially deeper than the active MOSFET cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.