Method of performing dynamic voltage and frequency scaling based on power step
US11243604B2 · kind B2 · utility
0Cited by
7References
20Claims
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Key dates
| Filing date | Apr 29, 2020 |
| Grant date | Feb 8, 2022 |
| Priority date | — |
| Expiry date | Apr 29, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Dynamic voltage and frequency scaling (DVFS) is performed based on a power step by setting a plurality of power levels corresponding to a plurality of available frequencies of a clock signal for an operation of a processor, setting a plurality of power steps corresponding to the plurality of available frequencies, and controlling a conversion between the plurality of power levels based on a utilization of the processor and the plurality of power steps. Performance and power consumption of a processor are controlled efficiently by performing power level conversion based on the power step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.