Patent · US Active

Apparatus and method for scaling pre-scaled results of complex multiply-accumulate operations on packed real and imaginary data elements

US11243765B2 · kind B2 · utility

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49References
33Claims
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Key dates

Filing dateSep 29, 2017
Grant dateFeb 8, 2022
Priority date
Expiry dateOct 16, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2207/3828
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Apparatus and method to transform complex data including a processor that comprises: multiplier circuitry to multiply packed complex N-bit data elements with packed complex M-bit data elements to generate at least four real products; adder circuitry to subtract a first real product from a second real product to generate a first temporary result, subtract a third real product from a fourth real product to generate a second temporary result, add the first temporary result to a first packed N-bit data element to generate a first pre-scaled result, subtract the first temporary result from the first packed N-bit data element to generate a second pre-scaled result, add the second temporary result to a second packed N-bit data element to generate a third pre-scaled result, and subtract the second temporary result from the second packed N-bit data element to generate a fourth pre-scaled result; and scaling circuitry to scale the pre-scaled results.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.