Patent · US Active

Semiconductor apparatus and method for controlling semiconductor apparatus

US11244711B2 · kind B2 · utility

5Cited by
3References
15Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMar 12, 2020
Grant dateFeb 8, 2022
Priority date
Expiry dateMar 12, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L25/0657
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

According to one embodiment, there is provided a semiconductor apparatus including a first chip and a second chip. The first chip is electrically connected to a terminal to which a signal from a host device is input. The second chip is electrically connected to the first chip. The second chip has a first duty adjustment circuit. The first chip has a second duty adjustment circuit. The first duty adjustment circuit performs first calibration operation in a first period. The second duty adjustment circuit performs second calibration operation in a second period. The first period and the second period have an overlapping period.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.