Semiconductor package
US11244921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2019 |
| Grant date | Feb 8, 2022 |
| Priority date | — |
| Expiry date | Apr 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/35121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is provided. The semiconductor package includes a connection structure, a semiconductor chip, and a connection metal. The connection structure includes a redistribution layer and a connection via layer. The semiconductor chip is disposed on the connection structure, and includes a connection pad. The connection metal is disposed on the connection structure and is electrically connected to the connection pad by the connection structure. The connection via layer includes a connection via having a major axis and a minor axis, and in a plan view, the minor axis of the connection via intersects with the connection metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.