Thin film transistor, array substrate, display apparatus, and method of fabricating thin film transistor
US11244970B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 24, 2017 |
| Grant date | Feb 8, 2022 |
| Priority date | — |
| Expiry date | Dec 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/471
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present application discloses a thin film transistor. The thin film transistor includes a base substrate; an active layer; an etch stop layer on a side of the active layer distal to the base substrate; and a source electrode and a drain electrode on a side of the etch stop layer distal to the active layer. The active layer includes a channel region, a source electrode contact region, and a drain electrode contact region. An orthographic projection of the etch stop layer on the base substrate surrounds an orthographic projection of the drain electrode contact region on the base substrate. An orthographic projection of the source electrode contact region on the base substrate at least partially peripherally surrounding the orthographic projection of the etch stop layer on the base substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.