Method and apparatus to reduce power consumption for refresh of memory devices on a memory module
US11250902B2 · kind B2 · utility
1Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2019 |
| Grant date | Feb 15, 2022 |
| Priority date | — |
| Expiry date | Dec 5, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Power consumption for refresh of memory devices on a memory module is reduced by each memory device on the memory module to one of a plurality of sub channels on the memory module. Each sub channel has a thermal sensor that monitors the temperature of the DRAM chips in the region. The refresh rate is increased only for the memory devices in the sub channel in which the memory devices operate above a predefined high temperature. This results in a reduction in power required by the memory module for refresh and an increase in the maximum bandwidth of the memory module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.