Semiconductor device and method of fabricating the same
US11251313B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2020 |
| Grant date | Feb 15, 2022 |
| Priority date | — |
| Expiry date | Apr 16, 2040 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB82Y10/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a channel pattern including first and second semiconductor patterns stacked on a substrate, a gate electrode covering top and lateral surfaces of the channel pattern and extending in a first direction, and including a first gate segment between the first semiconductor pattern and the second semiconductor pattern, a gate spacer covering a lateral surface of the gate electrode and including an opening exposing the channel pattern, and a first source/drain pattern on a side of the gate spacer and in contact with the channel pattern through the opening, the first source/drain pattern including a sidewall center thickness at a height of the first gate segment and at a center of the opening, and a sidewall edge thickness at the height of the first gate segment and at an edge of the opening, the sidewall edge thickness being about 0.7 to 1 times the sidewall center thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.