Control chip supporting consumer electronics control protocol and high voltage tolerant output circuit thereof
US11251701B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2021 |
| Grant date | Feb 15, 2022 |
| Priority date | — |
| Expiry date | Feb 24, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A high voltage tolerant output circuit includes a boost circuit, a first bias circuit, and a buffer circuit. The boost circuit includes a first transistor and an output node. A first terminal of the first transistor is coupled with the output node. The first bias circuit is coupled with the output node and a control terminal of the first transistor, and for dividing the output voltage of the output node. The first bias circuit is further configured to transmit the divided output voltage to the control terminal of the first transistor. The buffer circuit is coupled with a second terminal of the first transistor, and for setting a first voltage of the second terminal of the first transistor. The output voltage is positive correlated to the first voltage, and a maximum value of the output voltage is higher than or equal to a maximum value of the first voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.