Patent · US Active

Test device and method with built-in self-test logic

US11255906B2 · kind B2 · utility

0Cited by

1References

12Claims

0Family size

Assignee

Montage Technology, Inc. · CN

Inventors

Dan Wang · Allen, US
Ranran FAN · Shanghai, CN
Xiao Zhu · Dollard-Des-Ormeaux, CA
Zhongyuan Chang · Shanghai, CN
Xin Liu · Huizhou, CN

Key dates

Filing date	Sep 15, 2020
Grant date	Feb 22, 2022
Priority date	—
Expiry date	Sep 15, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/318385
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A test device and method with built-in self-test logic and a communication device. The test device includes at least one generator and at least one checker which are disposed between a physical layer and a medium access control layer. The at least one generator is configured to generate a protocol pattern to form a data path between the physical layer and the medium access control layer, and generate different pseudo random bit sequence patterns in the data path. The at least one checker is configured to test a data stream in the physical layer and/or the medium access control layer according to the pseudo random bit sequence patterns, thereby locating a fault position.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.