Electronic circuit and method for clock skew-calibration
US11256286B1 · kind B1 · utility
5Cited by
6References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 5, 2021 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Apr 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00273
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The electronic circuit for multiphase clock skew calibration of at least one example embodiment provides a novel low power solution to detect clock skew errors with very high accuracy, of the order of a few femto seconds, and corrects clock skew errors and decreases and/or minimizes high frequency jitter in a data path of the electronic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.