Method for securing a cryptographic process with SBOX against high-order side-channel attacks
US11256478B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 2018 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Feb 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/16
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method for securing against N-order side-channel attacks a cryptographic process using in a plurality of encryption rounds an initial Substitution box S0 comprising the steps of: —generating (E12) a first randomized substitution box S1 by masking said initial substitution box S0 such that S1(x XOR m1)=S0(x) XOR m2, with m1, m2 uniformly-distributed random values, for any input value x of the initial substitution box S0, —generating (E13) a first transrandomized Substitution box S(1,1) from the first randomized substitution box S1 and from masks m1,1, m′1,1 such that S(1, 1)[x]=S1[x xor (m1 xor m1,1)] xor (m2 xor m′1,1) for any input value x of the first transrandomized Substitution box S(1,1), —generating (E14) from the first transrandomized Substitution box S(1,1) a N−1th transrandomized Substitution box S(1, N−1) by performing iteratively N−2 times a step of generation of a ith transrandomized Substitution box S(1, i) from a i−1th transrandomized substitution box S(1, i−1) and from a plurality of masks m 1,i, m′1,i, m1,i−1, m′1,i−1 such that S(1, i)[x]=S(1, i−1)[x xor (m1,i-1 xor m1,i)] xor (m′1,i−1 xor m′1,i) for any input value x of the ith tr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.