Patent · US Active

Gate driver on array (GOA) circuit and display panel

US11257411B2 · kind B2 · utility

2Cited by
0References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 24, 2020
Grant dateFeb 22, 2022
Priority date
Expiry dateSep 16, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG09G2310/08
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

The present invention provides a gate driver on array (GOA) circuit and a display panel, in the GOA circuit, a nth one of GOA units has a pull-up control module, a logical addressing module, a pull-up module, first pull-down module, a second pull-down module, a first pull-down maintenance module connected to a first node, a second pull-down module, a third pull-down module, and a second pull-down maintenance module connected to a third node, and a logical addressing module. The logical addressing module pulls up a potential of a second node potential twice to facilitate increasing a threshold voltage margin.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.