Shift register and driving method thereof, and display apparatus
US11257454B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Apr 22, 2019 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Dec 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register, a method for driving the shift register and a display apparatus are provided. The shift register includes a noise reduction control circuit and a pull-up node noise reduction circuit. The noise reduction control circuit is connected with a first clock signal terminal that receives a first clock signal, a gate drive signal output terminal that outputs a gate drive signal, a noise reduction control terminal, and a noise reduction control node. The pull-up node noise reduction circuit is connected with the noise reduction control circuit, the noise reduction control terminal, and a pull-up node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.