Patent · US Active

Memory system

US11257548B2 · kind B2 · utility

3Cited by
0References
10Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 27, 2018
Grant dateFeb 22, 2022
Priority date
Expiry dateAug 10, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/0483
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A memory system includes a connector through which power for the memory system is to be supplied from an external device, a controller, a nonvolatile memory device, a power source circuit connected to the controller and the nonvolatile memory device by power lines through which power is supplied to the controller and the nonvolatile memory device, and a power source control circuit that receives a supply of power from the external device through the connector and supplies the power to the power control circuit. The power source control circuit is configured to detect using a divided voltage of a voltage of the power supplied thereto, that the voltage of the power supplied thereto is higher than a predetermined voltage and interrupt the power supplied to the power control circuit if the voltage of the power supplied thereto is higher than the predetermined voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.