Manufacturing method for semiconductor device and integrated semiconductor device
US11257720B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2018 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Nov 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method for a semiconductor device, and an integrated semiconductor device. The manufacturing method comprises: on a semiconductor substrate, forming an epitaxial layer having a first region, a second region, and a third region; forming at least one groove in the third region, forming at least two second doping deep traps in the first region, and forming at least two second doping deep traps in the second region; forming a first dielectric island between the second doping deep traps and forming a second dielectric island on the second doping deep traps; forming a first doping groove at both sides of the first dielectric island in the first region; forming a gate structure on the first dielectric island; forming an isolated first doping source region using the second dielectric island as a mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.