Semiconductor package including molding member, heat dissipation member, and reinforcing member
US11257786B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2020 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Mar 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06589
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including a package substrate; a first semiconductor chip on the package substrate; a second semiconductor chip on an upper surface of the first semiconductor chip; an insulating layer on surfaces of the first semiconductor chip and the second semiconductor chip; a heat dissipation member on the insulating layer such that the heat dissipation member includes a region on an upper surface of the first semiconductor chip on which the second semiconductor chip is not disposed, and a region on an upper surface of the second semiconductor chip; a molding member on the package substrate and encapsulating the first semiconductor chip, the second semiconductor chip, and the heat dissipation member such that the molding member exposes at least a portion of an upper surface of the heat dissipation member; and a reinforcing member on the heat dissipation member and the molding member.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.