Thin film transistor and manufacturing method thereof, and display apparatus
US11257954B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2019 |
| Grant date | Feb 22, 2022 |
| Priority date | — |
| Expiry date | Nov 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/27
Abstract
Provided are a thin film transistor including: a base cushion layer having a recessed portion, base insulating layer, source-drain layer and active layer. The base insulating layer is located on a side of the base cushion layer where the recessed portion is located, and has a first and second partition walls that are spaced apart, and an orthographic projection region of a gap region between the first and second partition walls onto the base cushion layer is located at a region where the recessed portion is located; and both orthographic projection regions of the first and second partition walls onto the base cushion layer partially overlap with the recessed portion region; and both the source-drain layer and the active layer are located on the side of the base insulating layer away from the base cushion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.