GaN-based VCSEL chip based on porous DBR and manufacturing method of the same

US11258231B2 · kind B2 · utility

Assignee

• INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Lixia Zhao · Hunan, CN
• Chao Yang · Beijing, CN
• Lei Liu · Thousand Oaks, US
• Jing Li · Houston, US
• Kaiyou Wang · 龙王头村, CN
• Hongda Chen · Boyds, US

Key dates

• Filing date: Jun 1, 2017
• Grant date: Feb 22, 2022
• Expiry date: Sep 22, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01S2301/173
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

A GaN-based VCSEL chip based on porous DBR and a manufacturing method of the same, wherein the chip includes: a substrate; a buffer layer formed on the substrate; a bottom porous DBR layer formed on the buffer layer; an n-type doped GaN layer formed on the bottom porous DBR layer, which is etched downward on its periphery to form a mesa; an active layer formed on the n-type doped GaN layer; an electron blocking layer formed on the active layer; a p-type doped GaN layer formed on the electron blocking layer; a current limiting layer formed on the p-type doped GaN layer with a current window formed at a center thereof, wherein the current limiting layer covers sidewalls of the active layer, the electron blocking layer and the convex portion of the n-type doped GaN layer; a transparent electrode formed on the p-type doped GaN layer; an n-electrode formed on the mesa of the n-type doped GaN layer; a p-electrode formed on the transparent electrode with a recess formed therein; and a dielectric DBR layer formed on the transparent electrode in the recess of the p-electrode.