Memory controller, storage device, information processing system, and memory control method
US11262936B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2016 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Apr 25, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The write time is to be shortened in a storage device using memories that require different write times from each other, such as nonvolatile memories.In a memory controller including a plurality of write request holding units and a selection unit, the write request holding units holds a write request with respect to each of a plurality of memory modules that require different write times from one another. The selection unit selects one of the plurality of write request holding units in accordance with memory state information indicating whether each of the plurality of memory modules is in a busy state, and causes outputting of the write request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.