Superconducting devices with ferromagnetic barrier junctions
US11264089B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2020 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Aug 24, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S505/832
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A superconducting memory cell includes a magnetic Josephson junction (MJJ) with a ferromagnetic material, having at least two switchable states of magnetization. The binary state of the MJJ manifests itself as a pulse appearing, or not appearing, on the output. A superconducting memory includes an array of memory cells. Each memory cell includes a comparator with at least one MJJ. Selected X and Y-directional write lines in their combination are capable of switching the magnetization of the MJJ. A superconducting device includes a first and a second junction in a stacked configuration. The first junction has an insulating layer barrier, and the second junction has an insulating layer sandwiched in-between two ferromagnetic layers as barrier. An electrical signal inputted across the first junction is amplified across the second junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.