Semiconductor structure and manufacturing method thereof
US11264322B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2020 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | May 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a semiconductor device, an interconnect structure, a capacitor, and a plurality of pads. The semiconductor device is disposed at the substrate. The interconnect structure is disposed on the substrate and electrically connected to the semiconductor device. The capacitor is disposed on the interconnect structure and electrically connected to the interconnect structure. The capacitor includes a first electrode, a second electrode covering a top surface and a sidewall of the first electrode, and an insulating layer disposed between the first electrode and the second electrode. The plurality of pads are disposed on the interconnect structure and electrically connected to the interconnect structure, wherein at least one of the plurality of pads is electrically connected to the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.