Two-phase boost converter with reduced voltage stress, and inherent current balancing
US11264896B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 18, 2019 |
| Grant date | Mar 1, 2022 |
| Priority date | — |
| Expiry date | Jun 18, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A two-phase boost converter is provided. The converter includes a first boost converter coupled between an input node and a common node; and a second boost converter coupled between the input node and an output node, wherein the second boost converter comprises: a first transistor coupled between ground and an internal node, an inductor coupled between the input node and the internal node, a capacitor coupled between the internal node and the common node, and a second transistor coupled between the common node and the output node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.