Patent · US Active

Trench capacitor with warpage reduction

US11271072B2 · kind B2 · utility

0Cited by

1References

19Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Jiao Jia · Chengdu, CN
Zhipeng Feng · Beijing, CN
He Lin · Frisco, US
Yunlong Liu · Chengdu, CN
Manoj Kumar Jain · Austin, US

Key dates

Filing date	Jan 28, 2020
Grant date	Mar 8, 2022
Priority date	—
Expiry date	Jan 28, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/66
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A trench capacitor includes a plurality of trenches in a semiconductor substrate. A first polysilicon layer is located within the plurality of trenches and over a top surface of the substrate. The first polysilicon layer is continuous between the plurality of trenches. The trench capacitor further includes a plurality of second polysilicon layers. Each of the second polysilicon layers fills a corresponding trench of the plurality of trenches. The second polysilicon layers each extend to a top surface of the first polysilicon layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.