Electronic display visual artifact mitigation
US11271181B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2019 |
| Grant date | Mar 8, 2022 |
| Priority date | — |
| Expiry date | Nov 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An electronic display having pixels and control circuitry to drive the pixels to display image data even during relatively long presentation times without visual artifacts, such as flicker, are provided. The control circuitry may cause the pixel to perform a threshold voltage sampling and pixel programming phase to store image data for the pixel while accounting for a first threshold voltage of the first transistor. Afterward, an on-bias stress phase may cause a threshold voltage of the first transistor of the plurality of transistors to reach a second threshold voltage. Following the on-bias stress phase, a first emission phase may cause the light-emitting diode to emit light in accordance with the image data, and subsequent on-bias stress phases and subsequent emission phases for the duration of the presentation time may take place without a visible flicker artifact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.