System and method for supporting scalable bit map based P_Key table in a high performance computing environment
US11271870B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2017 |
| Grant date | Mar 8, 2022 |
| Priority date | — |
| Expiry date | Jan 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/484
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
System and method for supporting scalable bitmap based P_Key table in a high performance computing environment. A method can provide, at least one subnet comprising one or more switches, a plurality of host channel adapters, and a plurality of end nodes. The method can associate the plurality of end nodes with at least one of a plurality of partitions, wherein each of the plurality of partitions are associated with a P_Key value. The method can associate each of the one or more switches with a bitmap based P_Key table of a plurality of bitmap based P_Key tables. The method can associate each of the host channel adapters with a bitmap based P_Key table of the plurality of bitmap based P_Key tables.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.