Patent · US Active

IC product comprising a single active fin FinFET device and an electrically inactive fin stress reduction structure

US11276651B2 · kind B2 · utility

0Cited by
3References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 18, 2020
Grant dateMar 15, 2022
Priority date
Expiry dateMay 18, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/834
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An illustrative device disclosed herein includes a semiconductor substrate and a FinFET transistor device positioned above the semiconductor substrate, wherein the FinFET transistor device has a single active fin structure. The device also includes an electrically inactive dummy fin structure positioned adjacent the single active fin structure, wherein the electrically inactive dummy fin structure is electrically inactive with respect to electrical operation of the FinFET transistor having the single active fin.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.