Array substrate, method of fabricating array substrate, display panel, and display device
US11276735B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2018 |
| Grant date | Mar 15, 2022 |
| Priority date | — |
| Expiry date | Dec 2, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/135
Abstract
The present disclosure generally relates to display technologies, and in particular, to an array substrate, a method of fabricating array substrate, a display panel including the array substrate, and a display device including the display panel. The array substrate includes a substrate; a plurality of sub-pixel units provided on the substrate, each sub-pixel unit including a pair of sub-pixels; a first pixel defining portion provided between the pair of sub-pixels in a sub-pixel unit; a second pixel defining portion provided between a pair of adjacent sub-pixel units. The height of the first pixel defining portion is lower than the height of the second pixel defining portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.