Variable resistance memory device
US11276821B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2020 |
| Grant date | Mar 15, 2022 |
| Priority date | — |
| Expiry date | Mar 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
A semiconductor device includes a plurality of first conductive lines disposed on a substrate, a plurality of second conductive lines intersecting the plurality of first conductive lines, and a plurality of cell structures interposed between the plurality of first conductive lines and the plurality of second conductive lines. At least one among the plurality of cell structures includes a first electrode, a switching element disposed on the first electrode, a second electrode disposed on the switching element, a first metal pattern disposed on the second electrode, a variable resistance pattern interposed between the first metal pattern and at least one among the plurality of second conductive lines, and a first spacer disposed on a sidewall of the variable resistance pattern, a sidewall of the first metal pattern and a sidewall of the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.