Patent · US Active

Memory system and storage device including printed circuit board with subset of channels arranged in point-to-point topology and subset of channels arranged in daisy-chain topology

US11277916B2 · kind B2 · utility

0Cited by
9References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 1, 2020
Grant dateMar 15, 2022
Priority date
Expiry dateOct 1, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH05K2201/10734
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory system includes a printed circuit board, at least one memory chip mounted on the printed circuit board, and a memory controller arranged on the printed circuit board and connected to 2N (where N is an integer of 2 or more) channels, the memory controller configured to perform a write operation and a read operation on the at least one memory chip. In the printed circuit board, a first subset of the channels corresponds to a first channel group configured in a point to point topology, and a remaining subset of the channels corresponds to a second channel group configured in a daisy chain topology.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.