Patent · US Active

System-on-chip having secure debug mode

US11280829B1 · kind B1 · utility

4Cited by

2References

20Claims

0Family size

Assignee

XLNX, INC. · US

Inventors

Ramakrishna G. Poolla · Hyderabad, IN
Krishna C. Patakamuri · Hyderabad, IN
James D. Wesselkamper · Albuquerque, US
Jason J. Moore · Albuquerque, US
Edward S. Peterson · Rio Rancho, US
Steven E. McNeil · Rio Rancho, US

Key dates

Filing date	Dec 19, 2019
Grant date	Mar 22, 2022
Priority date	—
Expiry date	Oct 13, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH04L9/3247
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Disclosed approaches for controlling debug access to an integrated circuit (IC) device include receiving a debug packet by a debug interface circuit of the IC device. The debug interface circuit authenticates the debug packet in response to the debug packet having a command code that specifies enable debug mode or a command code that specifies disable debug mode. In response to the debug packet passing authentication and the command code specifying enable, the debug interface circuit enables debug mode of the IC device. In response to the debug packet passing authentication and the command code specifying disable, the debug interface circuit disables the debug mode of the IC device. In response to the debug packet failing authentication, the debug interface circuit rejects the debug packet.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.