Systems and methods for checkpointing in a fault tolerant system
US11281538B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2020 |
| Grant date | Mar 22, 2022 |
| Priority date | — |
| Expiry date | Jun 13, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system of checkpointing in a computing system having a primary node and a secondary node is disclosed. In one embodiment the method includes the steps of determining by the primary node to initiate a checkpoint process; sending a notification to the secondary node, by the primary node, of an impending checkpoint process; blocking, by the primary node, I/O requests from the Operating System (OS) that arrive at the primary node after the determination to initiate the checkpoint process; completing, by the primary node, active I/O requests for data received from the OS prior to the determination to initiate the checkpoint process, by accessing the primary node data storage; and upon receiving, by the primary node, a notice of checkpoint readiness from the secondary node, initiating a checkpoint process to move state and data from the primary node to the secondary node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.