Patent · US Active

Memory device

US11281576B2 · kind B2 · utility

0Cited by
5References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 20, 2020
Grant dateMar 22, 2022
Priority date
Expiry dateNov 26, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7201
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory device includes a non-volatile memory block, a protection unit arranged for connecting to a communication bus, and a sequencer arranged to receive commands from the protection unit. A logic circuit is arranged to output an enabling signal, and includes first and second logic subcircuits, and a combiner logic circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.