Patent · US Active

Unified memory management for a multiple processor system

US11281583B1 · kind B1 · utility

0Cited by
0References
20Claims
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Assignee

Inventors

Key dates

Filing dateSep 24, 2020
Grant dateMar 22, 2022
Priority date
Expiry dateSep 24, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1056
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Various multi-processor unified memory management systems and methods are detailed herein. In embodiments detailed herein, inter-chip memory management modules may be executed by processors that are in communication via an inter-chip link. A flat memory map may be used across the multiple processors of the system. Each inter-chip memory management module may analyze memory transactions. If the memory transaction is directed to a portion of the flat memory map managed by another processor, the memory-transaction may be translated to a non-memory mapped transaction and transmitted via an inter-chip communication link.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.