Semiconductor devices having improved electrical characteristics and methods of fabricating the same
US11282787B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2020 |
| Grant date | Mar 22, 2022 |
| Priority date | — |
| Expiry date | May 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The semiconductor device provided comprises a substrate that includes active regions that extends in a first direction and a device isolation layer that defines the active regions, word lines that run across the active regions in a second direction that intersects the first direction, bit-line structures that intersect the active regions and the word lines and that extend in a third direction that is perpendicular to the second direction, first contacts between the bit-line structures and the active regions, spacer structures on sidewalls of the bit-line structures, and second contacts that are between adjacent bit-line structures and are connected to the active regions. Each of the spacer structures extends from the sidewalls of the bit-line structures onto a sidewall of the device isolation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.