Multi-level boost apparatus
US11283354B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2019 |
| Grant date | Mar 22, 2022 |
| Priority date | — |
| Expiry date | Jul 29, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multi-level boost apparatus. Voltage allocation among N first switches is achieved by arranging the N voltage dividing modules. It is prevented that the second one to the N-th one of the first switches break down and fail due to overvoltage. By arranging an (i−1)-th clamp branch at a common node between an (i−1)-th second switch and an i-th second switch, a voltage bore by the i-th second switch is clamped at a difference between a voltage across the fourth branch (namely, an output voltage of the multi-level boost apparatus) and a voltage across the corresponding clamp branch. The risk is avoided that a second one to the N-th one of the second switches break down due to overvoltage at an instant of being powered, in a case that the input voltage is low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.