Negative feedback system architecture and loop filter thereof
US11283414B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2020 |
| Grant date | Mar 22, 2022 |
| Priority date | — |
| Expiry date | Apr 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45652
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A negative feedback system architecture and a loop filter thereof are provided. The negative feedback system architecture includes a loop filter, a pulse width modulation circuit, and a driver. The loop filter includes a three-stage series integrator for receiving a signal and outputting the filtered signal. The loop filter has three in-bandwidth poles and at least two in-bandwidth zeros. The pulse width modulation circuit is electrically connected to the loop filter for receiving the filtered signal and modulating it into a pulse width modulation signal to output. The driver is electrically connected to the pulse width modulation circuit and the loop filter for receiving the pulse width modulation signal to generate an output signal to drive a load device, and the output signal is fed back to the loop filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.