Systems and methods for calibrating devices using directed acyclic graphs
US11288073B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 2020 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Jul 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N60/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A hybrid processor includes a classical (digital) processor and a quantum processor and implements a calibration procedure to calibrate devices in the quantum processor. Parameter measurements are defined as vertices in a directed acyclic graph. Dependencies between measurements are defined as directed edges between vertices. The calibration procedure orders the vertices, respecting the order of the dependencies while at least attempting to reduce the time needed to perform all the measurements. The calibration procedure provides a level of abstraction to allow non-expert users to use the calibration procedure. Each vertex has a set of attributes defining the status of the measurement, time of the measurement and value of the measurement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.