Method for multi-level etch, semiconductor sensing device, and method for manufacturing semiconductor sensing device
US11289336B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2020 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Jan 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/119
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Present disclosure provides a method for multi-level etch. The method includes providing a substrate, forming a first reference feature over a control region of the substrate, forming an etchable layer over the first reference feature and a target region over the substrate, patterning a masking layer over the etchable layer, the masking layer having a first opening projecting over the control region and a second opening projecting over the target region, and removing a portion of the etchable layer through the first opening and the second opening until the first reference feature is reached. A semiconductor sensing device manufactured by the multi-level etch is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.