GaN-based superjunction vertical power transistor and manufacturing method thereof

US11289594B2 · kind B2 · utility

Assignee

• INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES · CN

Inventors

• Sen HUANG · Beijing, CN
• Xinhua Wang · Melbourne, AU
• Xinyu Liu · Nanhu, CN
• Yuankun Wang · Beijing, CN
• Haibo YIN · Beijing, CN
• Ke Wei Wei · Beijing, CN

Key dates

• Filing date: Mar 14, 2019
• Grant date: Mar 29, 2022
• Expiry date: Mar 14, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/513

Abstract

A GaN-based superjunction vertical power transistor and a manufacturing method thereof. The transistor includes: a N−-GaN layer; a first P-GaN layer as a current blocking layer, formed on the N−-GaN layer and having a gate region window; and a thin barrier Al(In, Ga)N/GaN heterostructure conformally formed on the current blocking layer and filling the bottom and one or more sidewalls of the gate region window, wherein the N−-GaN layer has an etched groove completely or partially filled with a second P-type GaN layer, an N+-GaN layer is formed under the second P-type GaN layer, and the N+-GaN layer is in direct contact with the second P-type GaN layer and the N−-GaN layer to form a superjunction composite structure.