Common-mode insensitive current-sensing topology in full-bridge driver
US11290071B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2020 |
| Grant date | Mar 29, 2022 |
| Priority date | — |
| Expiry date | Aug 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/03
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second high-side switch and the supply voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second high-side switch is activated. The sy…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.