Method and apparatus for dual issue multiply instructions
US11294673B2 · kind B2 · utility
0Cited by
9References
20Claims
0Family size
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Key dates
| Filing date | May 20, 2020 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | May 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2017/0298
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided that includes performing, by a processor in response to a dual issue multiply instruction, multiplication of operands of the dual issue multiply instruction using multiplication units comprised in a data path of the processor and configured to operate together to determine a product of the operands, and storing, by the processor, the product in a storage location indicated by the dual issue multiply instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.