Time-multiplexed dot products for neural network inference circuit
US11295200B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2018 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | Jan 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments provide a method for a neural network inference circuit that executes a neural network including multiple nodes. The method loads a first set of weight values into a first set of weight value buffers, a second set of weight values into a second set of weight value buffers, a first set of input values into a first set of input value buffers, and a second set of input values into a second set of input value buffers. In a first clock cycle, the method computes a first dot product of the first set of weight values and the first set of input values. In a second clock cycle, the method computes a second dot product of the second set of weight values and the second set of input values. The method adds the first and second dot products to compute a dot product for the node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.