Patent · US Active

Neural processing unit (NPU) direct memory access (NDMA) memory bandwidth optimization

US11295205B2 · kind B2 · utility

1Cited by

10References

20Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Jinxia Bai · San Diego, US
Rosario Cammarota · San Diego, US
Michael Goldfarb · Little Silver, US

Key dates

Filing date	Sep 28, 2018
Grant date	Apr 5, 2022
Priority date	—
Expiry date	Oct 17, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG06N3/09
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A neural processing unit (NPU) is described. The NPU includes an NPU direct memory access (NDMA) core. The NDMA core includes a read engine having a read buffer. The NDMA core also includes a write engine having a write buffer. The NPU also includes a controller. The controller is configured to direct the NDMA core to perform hardware memory bandwidth optimization for reading/writing NDMA data in the read buffer and/or NDMA data in the write buffer. The NDMA core is also configured to transparently combine NDMA transaction requests for a data stripe to increase local access to available tensors in artificial neural networks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.