Gate driving circuit, current adjusting method thereof and display device
US11295693B2 · kind B2 · utility
0Cited by
1References
13Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 9, 2019 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | Jun 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a gate driving circuit, a current adjusting method thereof, and a display device. The gate driving circuit includes at least one gate driving sub-circuit. Each gate driving sub-circuit includes an output circuit and a current limiting circuit. The output circuit is configured to output a gate driving signal. The current limiting circuit is electrically connected to the output circuit. The current limiting circuit is configured to limit a current magnitude of the gate driving signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.