Method for manufacturing non-volatile memory
US11296194B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2020 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | Apr 14, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/661
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method for manufacturing a nonvolatile memory, including the steps of: forming a gate oxide layer on a substrate; forming a stacked capacitor of a storage cell after making a logic gate polysilicon undertake at least two deposition processes; and removing the extra logic gate polysilicon by an etching process to form a storage transistor and a peripheral logic transistor. According to the method of the present invention, the stacked capacitor of the storage transistor is formed by depositing at least twice, and the memory is manufactured in a standard logic process, which makes the manufacturing process of the memory simpler, the memory has good compatibility with the logic process and has low cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.