Memory device based on multi-bit perpendicular magnetic tunnel junction
US11296276B2 · kind B2 · utility
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13Claims
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Key dates
| Filing date | Nov 19, 2019 |
| Grant date | Apr 5, 2022 |
| Priority date | — |
| Expiry date | Jan 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F10/3286
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a memory device including a multi-bit perpendicular magnetic tunnel junction, wherein the multi-bit perpendicular magnetic tunnel junction includes an upper synthetic antiferromagnetic layer, pinned layer, lower dual free layer, and upper free layer formed in a laminated manner between a top electrode and a bottom electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.